Connecting an ltp printer via usb. LPT Port Application

The "LPT" port is rarely found on modern computers. This is a special connector on a computer for connecting a printer. Some computers were equipped with multiple LPT ports. These ports were numbered: "LPT1", "LPT2" and so on.

Parallel ports

Historically, ports for connecting a computer have been divided into categories: serial and parallel ports. "LPT" refers to parallel ports. This means that information travels along eight different wires, that is, simultaneously and in parallel. Computers deal with binary information. Binary converts information to arrays of zeros and ones. One binary number (zero or one) is called a bit. A group of eight bits is called a byte. The eight bits of each byte that move from the computer to the parallel port move at the same time. Another type of cable connected to the serial port moves eight bits of each byte one after the other.

Meaning

The parallel port has a name. The default name for the only parallel computer port is "LPT1". This view ports are mainly used to connect a printer. Other devices can be connected to these ports, but users use the printer much more often than other devices. Connecting a printer to a computer makes it a “peripheral”. "Peripheral" can be any additional device connected with a special cable to the computer. This "peripheral" equipment can only be used by one computer at a time. The only way to connect an already connected "peripheral" device to another computer is to use the printer connected to the first computer - through the network and software... This process is different from a network printer, which connects to a network rather than a single computer. In this case, a different type of cable and a different type of port are used.

Connection

The parallel port "LPT" and the corresponding connector has 25 pins and is called "DB-25" or "D-Type 25". The pins are exposed in the connector. They fit into 25 parallel port holes. Eight of the 25 pins are responsible for transmitting data, the rest carry either control data or printer instructions such as messages from the printer about the lack of paper in the printer.

Future

Network printers are connected to the computer not using the "LPT" port, but using the "Ethernet" port. Not only a printer, but also other devices can be connected to the LPT port. Today, "peripheral" devices do not use parallel ports. Both the LPT and serial ports are now history and have been replaced by a USB port, or a network port. The ability to wirelessly connect new printers and peripherals provides another alternative to the "LPT" port as a way to connect a printer to a computer.

The computer processes signals in parallel streams, so it is easier for it to "communicate" with parallel rather than serial external ports. In 1984, a parallel port was introduced to the IBM PC for the first time. It was conceived as a means of connecting matrix printers, hence the name LPT - Line PrinTer or Line Printer Terminal. Later, the high-speed USB interface began to be used for printers, and the LPT port began to be gradually replaced from computer specifications. Wits compare the LPT to a suitcase without a handle - and it's a pity to throw it away, and it's impossible to carry. Nevertheless, the "veteran" is still capable of a lot, if, of course, he is present in a particular computer.

The LPT port connector has 25 pins. The de facto norm is a DB-25F socket in a computer and a DB-25M plug in a mating cable (Table 4.2). The numbering of the contacts of plugs and sockets is mirrored (Fig. 4.7, a, b).

Table 4.2. Layout of signals in the 25-pin LPT-port connector

Decoding

Direction

Enter exit

Enter exit

Confirmation

Readiness

No paper

Auto-transfer

Enter exit

Initialization

Enter exit

Input selection

Enter exit

Rice. 4.7. Appearance in front of 25-pin LPT-port connectors: a) DB-25F socket in the computer; b) DB-25M plug in the connecting cable.

Originally, LPT port lines were unidirectional SPP (Standard Parallel Port). Some of them worked only for input, some - only for output, which in terms of the set of signals and exchange protocol corresponded to the "Centronics" printer interface. In 1994, a new standard for the parallel interface IEEE 1284 was approved, providing bidirectional lines and three modes of operation: SPP, EPP (Enhanced Parallel Port), ECP (Extended Capabilities Port).

The electrical signal levels of the LPT port are the same as those of conventional "five-volt" logic microcircuits. Previously, computers used buffer TTJl-microcircuits of the 74LSxx series, later - CMOS microcircuits and LSI, approximately equivalent to the 74ACxx series. In the latter case, we can roughly assume that the LOW level is 0.1..0.2 V, and the HIGH level is 4.5 ... 4.9 V.

The standard regulates the load of 14 mA for each output while maintaining the voltage of at least +2.4 V HIGH and no more than +0.4 V LOW. However, in different motherboards, the output buffers of the LPT port may have different load capacities, including those below the standard ("weak" port).

Requirements for connecting cables connected to the LPT port:

Signal wires should be twisted in pairs with a common GND;

Each pair must have an impedance of 56 ... 68 Ohm in the frequency range 4 ... 16 M Hz;

If flat ribbon cable is used, the signal wires must be physically interleaved with the GND common (local shields);

The level of cross-talk between signals is not more than 10%;

The cable must have a shield covering at least 85% of the outer surface. At the ends of the cable, the shield must be ringed and connected to the "ground" contact of the connector;

In the cable connector, you can solder series resistors C2-23 (OMJIT-O.125) with a resistance of 100… 300 Ohm on pins 1… 17 (Fig. 4.8). This will protect the computer from accidental short circuits in the load and reduce high-frequency "ringing" at the signal edges.

Rice. 4.8. Electrical diagram of LPT-cable with anti-ringing resistors.

Connection diagrams MK with LPT-port can be divided into three groups:

Receiving signals from a computer (Fig. 4.9, a… h);

Signal transmission to the computer (Fig. 4.10, a… e);

Receiving / transmitting signals simultaneously (Fig. 4.11, a… e).

Some simplifications are accepted in the diagrams. Mainly "DO" is indicated as an input signal, and "ACK" as an output signal, although there may be others listed in Table. 4.2. Performance on each specific computer homemade schemes it is necessary to check experimentally, which is associated with the presence of "strong" and "weak" LPT-ports in terms of load capacity.

Rice. 4.9. Signal input circuits from the LPT port to MK (beginning):

a) resistor R1 limits the input current. Elements R2, C1 may be absent, but they reduce the "ringing" on the edges of signals with a long cable;

b) the buffer transistor VT1 inverts the signal. The VD1 diode is optional, but it protects the transistor from erroneously applying a large negative voltage. If you do not install resistor R2, then the circuit will remain operational, however, when the cable is disconnected from the LPT port, false alarms of the transistor VT1 from external noise and interference are possible;

c) diode VD1 cuts off interference and raises the threshold of the transistor VT1. Resistor R1 reliably closes transistor VT1 at a LOW level from the LPT port;

d) the buffer logic element DD1 has an open collector output. The signal fronts are formed by the elements R1, C1. You can install a K155LP9 repeater instead of the DD1 inverter by making the appropriate changes in the MK program and the computer;

e) Schmitt trigger DD1 (replacement - K555TL2) increases noise immunity. The lower the resistance of the resistors R1, R2, the greater the steepness of the signal edges. When the cable is disconnected from the LPT port, the resistor R1 does not allow the input of the DD1 microcircuit to "hang in the air";

f) sequential inclusion of two logical elements DD11, /)/)/.2 increases (restores) the steepness of the signal edges. Resistor R1 eliminates overshoot, ringing;

Rice. 4.9. Signal input circuits from the LPT port to MK (end):

g) the data coming from the LPT port is preliminarily placed in the intermediate register DD1. Recording is performed at a HIGH level at the input "C" of the DD1 microcircuit, storage - at a LOW level. This solution eliminates the interference, since random data may be periodically output to the LPT port depending on the drivers installed in the computer. They are eliminated by software, for example, by repeatedly reading the input signal from the MK lines;

h) buffering the LPT port with powerful transistor switches located in the DA1 chip from Texas Instruments. Resistors R1 ... R8 can have 10 ... 15 times more low resistance, which allows you to connect in parallel to the outputs of the A4 microcircuit / other units of the device.

Rice. 4.10. Signal output circuits from MK to LPT port (beginning):

a) direct connection of MK output without buffer elements. Resistors R1, R2 reduce the reflection of signals in the line. In addition, resistor R2 protects the MK output from accidental short-circuiting with the GND circuit in the connecting cable wires;

b) Schmitt trigger DD1 serves as a protective buffer for MK in case of an emergency at the output (short circuit or high voltage supply);

c) the DD1 microcircuit has an open collector output, which protects it from a short circuit in the wires and connectors of the connecting cable;

d) supply of two antiphase signals to the computer. Purpose - software necessity or organization of a redundant (control) data transmission channel;

e) opto-decoupling on the elements HL1, BL1, which are used in computer mechanical "mice". The KG / transistor amplifies and inverts the signal. For normal work device, the computer must set the HIGH level on the "D8" line.

Rice. 4.11. Combined I / O Signals Between MK and LPT Port (Start):

a) if the computer sets the "DO" line to a HIGH level, then MK in the output mode can generate an "ACK" signal through the resistor R1. If MK is switched to input mode, the computer can transmit data to it on the "DO" line through the VD1 diode, while the internal "pull-up" resistor MK forms a HIGH level;

b) the signal from the LPT port is input to MK through an inverter on a transistor VT1, while the computer must set a HIGH level on the "D2" line. Information in MK is entered from the “DO” line through the resistor R1. The high resistance of the resistor R1 physically decouples the input and output channels;

Rice. 4.11. Combined I / O Signals Between MK and LPT Port (end):

b) the signal from the LPT port is input to MK through an inverter on a transistor VT1, while the computer must set a LOW level on the "DO" line. Information in the MC is entered through the elements R1, R3, VT2;

d) the signal from the LPT port is input to MK through a repeater on the transistor VT1, while the computer must set a HIGH level on the "DO" line. Information in MK is entered through a repeater on the DD1 microcircuit \

g) signals "D0" ... "D3" are input to MK at a LOW level on the "INIT" line, while the computer must configure the "D4" ... "D7" lines as inputs. In settings Computer BIOS you need to set the bi-directional EPP or ECP mode for the LPT port. Information to the computer from the MC is transmitted via the "D4" ... "D7" lines at a HIGH level on the "INIT" line. Resistor R1 transfers the outputs of the DD1 microcircuit to the Z-state when the cable is disconnected from the LPT port;

e) the signal from MK to the LPT port is entered through the DD1.2 repeater, while the computer must set the HIGH level on the "D2" line and the LOW level on the "D5" line. Information in MK is entered through the repeater DD1.1 at LOW line level "D2". The strobing of signals at the inputs "E1", "E2" of the DD1 microcircuit increases the reliability of data transmission.

Ministry of Education and Science of the Russian Federation

Federal State Budgetary Educational Institution

higher professional education

"Komsomolsk-on-Amur State Technical University"

Department "Industrial Electronics"

Testing the LPT port of a personal computer

Methodical instructions for laboratory work at the rate

"Debugging tools for microprocessor systems" for students of direction 210100 "Electronics and nanoelectronics"

Komsomolsk-on-Amur 2013

Testing the LPT port of a personal computer: Methodological instructions for laboratory work in the course "Debugging tools of microprocessor systems" for students of the direction 210100 "Electronics and nanoelectronics" / Comp. CM. Kopytov. - Komsomolsk-on-Amur: Komsomolsk-on-Amur state. tech. un-t, 2013 .-- 19 p.

The parallel interface Centronics, signals and software support for the LPT port of a personal computer are considered, recommendations for testing it are given.

The proposed guidelines are intended for students in the 210100 direction.

Published by the order of the Editorial and Publishing Council of the Komsomolsk-on-Amur State Technical University.

Agreed with the standardization department.

Reviewer V.A. Egorov

Purpose of work: explore the basic capabilities of a standard LPT port. To master the principles of software-controlled information exchange through a parallel port. Learn to check its performance.

1 basic information

1.1 Description of the parallel interface

Historically, the parallel interface was introduced into a personal computer (PC) to connect a printer (hence the acronym LPT - Line Printer). However, later the parallel interface began to be used to connect other peripheral devices (CP). The basic version of the port allows data to be transmitted only in one direction (from PC to CP), but later a number of standards for bidirectional data transmission were developed.

In modern office computers, the LPT port, as a rule, is not provided, however, by installing a multi-port expansion card, such a port can be at your disposal.

A parallel interface adapter is a set of registers located in the address space of I / O devices. The number of registers depends on the type of port, but three of them are standard and always present. These are data register, status register and control register. Register addresses are counted from the base one, the standard values ​​of which are 3BCh, 378h, 278h. The port can use a hardware interrupt (IRQ7 or IRQ9). Many modern systems allow you to change the port operation mode, its address and IRQ from the Base Input Output System (BIOS) Setup.

The LPT port has an external 8-bit data bus, a 5-bit status signal bus and a 4-bit control signal bus. Obviously, the port is asymmetrical  12 lines work for the output and only 5 for the input.

At initial boot, the BIOS tries to detect a parallel port, and makes it primitive and not always correct  a test byte consisting of an alternating set of zeros and ones (55h or AAh) is transmitted to the possible base addresses of ports, then reading is performed at the same address, and if the read byte coincides with the written one, then it is considered that the LPT port is found at this address. Define address LPT port 4 BIOS cannot. To work with the CP, the BIOS provides an INT 17h interrupt, which makes it possible to transfer data (byte-by-byte), initialize the CP and receive information about its state.

Centronics concept refers to the signal set, communication protocol, and 36-pin connector previously found in printers. The purpose of the signals and the contacts of the PU connector, to which they are brought out, are shown in Table 1.

Table 1 - Centronics interface signals

			Direction	Appointment
				Data strobe. It is transmitted by a computer, the data is recorded at a low signal level.
				Data lines. D0 is the least significant bit.
				Acknowledge - pulse of acknowledgment of byte reception (request to receive the next one). It can be used to generate an interrupt.
				Busy. Data reception is possible only when the signal level is low
				"1" signals the end of the paper
				"1" signals that the printer is turned on (GP - readiness of the receiver), usually +5 V through a resistor from the PU power supply)
				Automatic line feed. If "0", then PU, upon receipt of a CR (carriage return) character, performs the LF function - line feed
				PU error (off-line, no paper, no toner, internal error)
				Initialization (go to the beginning of the line, reset all parameters to their default values)
				Choosing a printer. With "1", the printer does not accept other interface signals
				Common wire

Note: column "T" - active signal level: "1" - high active level, "0" - low active level. Column "Direction" - the direction of transmission in relation to the printer: I - Input, O - Output (output).

The Auto LF signal is almost never used, but an incorrect value causes the printer to either skip lines, print lines on top of each other, or duplicate lines when printing in two passes.

The domestic analogue of the Centronics interface is IRPR-M. In addition to it, there is an IRPR interface (outdated), which differs in the exchange protocol, the absence of the "Error" signal and the inversion of data lines. In addition, pairs of matching resistors are connected to all input lines of the IRPR: 220 Ohm to +5 V and 330 Ohm to the common wire. This overloads most of the interface adapters of modern PCs.

The Centronics communication protocol is shown in Figure 1.

Figure 1 - Centronics data exchange protocol

The transmission begins with a check by the source of the Error signal. If it is set, then the exchange is not performed. Then the Busy signal status is checked. If it is "0", then the source proceeds to transfer the data byte. To transmit a byte, the source sets a data byte on the D0-D7 line and issues the Strobe # signal. The receiver on the Strobe # signal (hereinafter, the "#" after the signal name is a sign that the signal has a low active level) reads data from the data bus and sets the Busy signal for the duration of its processing. At the end of processing, the receiver issues the ACK # signal and removes the Busy signal.

If for a long time (6 - 12 seconds) the source does not receive ACK #, then it makes a decision about the device time-out error. If, after receiving a byte, the receiver for some reason is not ready to receive data, then it does not remove the Busy signal. When software implementation of the exchange according to the specified protocol, it is desirable to limit the waiting time for Busy removal (usually 30 - 45 seconds), otherwise the program may freeze.

The standard parallel port is called SPP (Standard Parallel Port). The SPP port is unidirectional; the Centronics exchange protocol is implemented on its basis. The port provides the ability to generate IRQs on the ACK # pulse at the input. Port signals are output to a standard DB-25S connector (female), which is located directly on the adapter board or connected to it with a flat ribbon cable (if the adapter is integrated with the motherboard).

The signal names correspond to the names of the Centronics interface signals (Table 1), and the image of the interface adapter connector from the computer side is shown in Figure 2.

Table 2 - Connector and ribbon cable of a standard LPT port

	Loop wire
					10, 22, 14, 16, 18, 20, 22, 24, 26

Note. I / O - transmission direction: I - input; O - exit; O (I) - output, the state of which can be read under certain conditions, O / I - output lines, the state of which is read when reading from the corresponding port registers. * - The ACK # input is connected to the +5 V supply through a 10 kOhm resistor. This is done to avoid false interrupts. an interrupt is generated on a negative edge of the signal at the ACK # input.

Figure 2 - Connector of the interface adapter Cetronics DB-25S

The disadvantages of the standard LPT port (SPP) are low data transfer rates (100 - 150 kB / s), processor load during data transfer, and the impossibility of bidirectional byte exchange. There is a "radio amateur" technique of bidirectional exchange, which consists in setting "1" for data input on the D0-D7 lines, and using open collector microcircuits as a transmitter, which, when the transistor is open, can "add" the voltage of a logical unit to the level about 1.5 - 1.7 V. The current is limited to 30 mA. As is evident from the signal levels, they do not correspond to TTL levels, therefore, many ports do not work in this mode or are unstable. In addition, this method can be dangerous for the port adapter, which will operate at its maximum currents.

IEEE 1284 standard adopted in 1994 defines the terms SPP, EPP and ECP. The standard defines 5 communication modes, a mode negotiation method, physical and electrical interfaces. According to IEEE 1284, the following communication modes are possible through the parallel port:

Compatibility Mode - unidirectional (output) according to the Centronics protocol. This mode corresponds to the standard SPP port;

Nibble Mode - input a byte in two cycles (4 bits each), using the status line to enter. This exchange mode can be used on any adapters;

Byte Mode - input a byte in its entirety, using data lines to receive. This mode works only on ports that can read the output data (Bi-Directional or PS / 2 Type 1);

EPP (Enhanced Parallel Port) Mode is a bidirectional data exchange in which interface control signals are generated by hardware during a cycle of accessing a port (reading or writing to a port). Effective when working with external memory devices, LAN adapters;

ECP (Extended Capability Port) Mode is a bidirectional exchange with the possibility of hardware data compression using the RLE (Run Length Encoding) method, the use of FIFO buffers and DMA. Interface control signals are generated by hardware. Effective for printers and scanners.

In modern machines with an LPT port on the motherboard, the port mode - SPP, EPP, ECP, or their combination is set in the BIOS Setup. Compatibility Mode is fully SPP compliant and is often set by default. All other modes expand the functionality of the interface and improve its performance. In addition, the standard regulates the way in which the mode available to both the PC and the peripheral device is negotiated.

Physical and electrical interface. The IEEE 1284 standard defines the physical characteristics of signal receivers and transmitters. It is essential that the transmission uses TTL logic levels.

The IEEE 1284 standard defines three types of connectors used: A (DB-25S), B (Centronics-36), C (new small size 36-pin connector). Interface cables can have between 18 and 25 conductors (depending on the number of GND conductors). Conventional cables can only operate at low speeds with a length of no more than 2 meters. Enhanced shielded cables with signal wires intertwined with common wires can be up to 10 meters long. These cables are labeled "IEEE Std 1284 - 1994 Compliant".

Parallel port operation low(that is, at the level of direct access to the port controller) is used to solve various tasks for exchanging information with non-standard devices, for writing printer drivers and a number of other tasks. Direct operation with the controller allows you to implement any communication protocol with the device and use the port lines at your discretion.

The port controller is located in the address space of the I / O devices and is accessed using the IN and OUT commands of the assembler. Information about ports LPT1 - LPT3 can be obtained by reading the BIOS variables shown in Table 3.

Table 3 - BIOS variables for LPT ports

Port name	BIOS address	Variable type	Description
			Base address of the LPT1 port. If the variable is 0, then the LPT1 port was not found
			Timeout constant
			Base address of the LPT2 port. If the variable is 0, then the LPT2 port was not found
			Timeout constant
			Base address of the LPT3 port. If the variable is 0, then the LPT3 port was not found
			Timeout constant
			Base address of the LPT4 port. If the variable is 0, then the LPT4 port was not found
			Timeout constant

BIOS looks for ports at Base addresses: 3BCh, 378h, 278h. The BIOS cannot find LPT4 port:

378h - parallel adapter LPT1;

278h - parallel adapter LPT2;

3BCh - parallel adapter LPT3.

The standard port has three 8-bit registers located at adjacent addresses, starting with the base (Base) address. The list of these registers is shown in Table 4.

Table 4 - Registers of the standard LPT port

Data register (DR). Data written to this register is output to the output lines of the D0D7 interface. The result of reading this register depends on the adapter circuitry and corresponds either to the previously recorded data or to the signals on the D0D7 lines, which is not always the same. With the standard inclusion, the first option is valid - the read data is equal to the previously written one.

Status register (SR)... It is a 5-bit input port to which status signals from an external device are connected. Read-only. The purpose of the bits of this register is shown in Table 5.

Table 5 - SR Status Register Bits

	Name	Appointment
		Inverse display of the Busy line state (11). At a low level on line 11 (Busy) - the bit is "1" - the PU is ready to receive the next byte
		Displays the status of the ACK # line (10). "0" - confirmation of receipt, "1" - normal state
		Displays the status of the Paper End line (12). "0" - norm, "1" - there is no paper in the PU
		Displays the status of the Select line (13). "0" - PU is not selected, "1" - PU is selected
	(inverse)	Displays the status of the Error line (15). "0" - CP error, "1" - normal state
		ACK # interrupt flag (PS / 2 only). Cleared if ACK # triggered a hardware interrupt. "1" - after reset or after reading the status register
		Not used (reserve)

Control register (CR). The control register is a 4-bit output port that can be read and written. Bits 0, 1, 3 are inverted, i.e. "1" in these bits of the control register corresponds to "0" on the corresponding port lines. The purpose of the control register bits is shown in Table 6. Bit 5 is used only by bidirectional ports.

Table 6 - Bits of the control register CR

	Name	Appointment
		Port direction control bit. "1" - input mode, "0" - output mode
		ACK # interrupt generation control bit. "1" - enable falling interrupt ACK # (10)
		Line control SLCT IN # (17). "1" - the printer is allowed.
		Line control INIT # (16). "1" - normal state, "0" - hardware reset of the control panel
		Line control Auto LF # (14). "1" - enable the "Auto LF" mode, "0" - normal state
		Line control Strobe # (1). "1" - data strobing, "0" - normal state

Interface programming. To develop application programs, you must choose a programming language. If you need a simple, fast and compact program that does not contain complex computational operations, then it is better to choose a low-level language (assembly language) for writing it. Assembly language belongs to the group of machine-oriented languages, i.e. each microprocessor family has its own language.

Language high level should be chosen if it is necessary to perform complex calculations, or if high speed of the program is not required. Object codes resulting from the translation of programs written in a high-level language usually take up much more space in the computer's memory and are executed slower than programs in assembly language. An approach is often used when the performance-critical parts of the program are written in assembler, and the computational procedures are written in a high-level language, for example, in Pascal or C.

Consider working with registers of the CENTRONICS interface in PASCAL or assembler:

X - number of "byte" type (0..255). For example, when sending 170 10 = = 10101010 2 on the d0 – d7 line, a single signal will be present at the pins d1, d3, d5, d7 (the designation of the pins starts with d0). The number 170 will remain on the pins of the connector until you send another number there (another program can also do this) or turn off the computer. Note that the port address in the command is given in hexadecimal, and the sending is in decimal. If instead of the Pascal command

Port [$ 378]: = 170;

You will apply

where d is a variable, then the variable will take the value of the last byte sent to the port or, when switching to the receive mode, the value of the byte supplied to the port by an external device.

An example of reading the status register in Pascal language:

The d variable will display the state of the port after the program is executed. Let's say the variable returned the value 126 10. In binary, it looks like 01111110 2. The least significant (right) three bits (zero, first and second) are not used, and are almost equal to 1, 1 and 0. The third bit is 1, which means the ERROR is high. The situation is the same for SELECT, Paper End, ACK and BUSY (remember that the BUSY signal is inverted).

Here is an example of a fragment of a program that reads a byte from data lines D0-D7:

Port [$ 37A]: = 32; value 32 "includes" one in the fifth

d: = Port [$ 378]; bit, putting the port into input mode

As can be seen from the above examples, programming the LPT port is a very simple task, which greatly facilitates the work of the developer of software for devices with the discussed interface.

1.2 Testing the LPT port

Testing an LPT port can be done with a simple plug that can be made using Table 7.

Table 7 - Table of stub circuits for testing LPT-port

	Direction			Direction

Parallel port and RnR

Most modern peripheral devices connected to LPT-nop-tu support the 1284 standard and PnP functions. To support these functions, a computer from a hardware point of view, it is enough to have an interface controller that complies with the 1284 standard. If the connected device supports PnP, it is able to "negotiate" with the port representing the "interests" of the computer about possible exchange modes using the 1284 mode negotiation protocol. Further, for PPR to work, the connected device must inform the operating system of all the necessary information about itself. At a minimum, these are manufacturer IDs, models, and a set of supported commands. More detailed information about the device may contain a class identifier, detailed description and the ID of the device to be compatible. According to the accepted information to support this device operating system can take steps to install the required software.

Devices with support for РпР are recognized by the OS at the stage of its loading, if, of course, they are connected to the port with an interface cable and they have power on. If Windows detects a connected PnP device that differs from what is written in its registry for this port (or just a new device), it tries to install the drivers required for the device from the OS distribution kit or from the package of a new device. If Windows does not want to notice the newly connected PnP device, this may indicate a problem with the port or cable. The PpP system does not work if the device is connected with a cheap "non-bi-directional" cable that does not have a Selectln # line connection (pin 17 of the LPT port and pin 36 of the Centronics connector).

Usually the LPT port is used to connect a printer (see p. 8.3.1), but this is not limited to its use.

To link two computers The parallel interface uses different cables depending on the modes of the ports being used. The simplest and slowest is the nibble mode, running on of all ports. For this mode, it is enough to have 10 signal wires and one common wire in the cable. The pinout of the cable connectors is shown in table. 1.11. Communication of two PCs with this cable is supported by standard software such as Interlnk from MS-DOS or Norton Commander.

High-speed communication between two computers can also be performed in the ECP mode (the EPP mode is inconvenient, since it requires synchronization of the bus I / O cycles of the two computers).

Connection scanner to the LPT port is effective only if the port provides at least bi-directional mode (Bi-Di), since the main thread is input. It is better to use the ECP port if this mode is supported by the scanner (or EPP, which is unlikely).

Connection external storage(Iomega Zip Drive, CD-ROM, etc.), LAN adapters and other symmetric input-output devices has its own specifics. In the SPP mode, along with the slowdown of the device, a fundamental asymmetry of this mode is noticeable: reading data happens twice as slow as(very slow) recording. Application bidirectional regime (Bi-Di or PS / 2 Tour 1) will eliminate this asymmetry - the speeds will be equal. Only by switching to EPP or ECP, you can get normal speed of work. In EPP or ECP mode, the connection to the LPT port is almost as fast as the connection through the ISA controller. This is also true when connecting devices with a standard bus interface to LPT ports through interface converters (for example, LPT - IDE, LPT - SCSI, LPT - PCMCIA). Note that an IDE hard drive connected via an adapter to the LPT port can be represented as a SCSI device for the system (this is more logical from a software point of view).

2. Serial interfaces

The serial interface for data transmission uses a single signal line, through which the information bits are transmitted one after the other sequentially. Hence the name of the interface and port. English terms - Serial Interface and Serial Part(sometimes they are mistranslated as "serial"). Serial transmission can reduce the number of signal lines and increase the communication range. A characteristic feature is the use of non-TTL signals. A number of serial interfaces use galvanic isolation of external (usually input) signals from the circuit ground of the device, which makes it possible to connect devices at different potentials. Below we will consider the interfaces RS-232C, RS-422A, RS-423A, RS-485, current loop, MIDI, as well as the COM port.

2.1. Serial communication methods

Serial data transmission can be asynchronous or synchronous. At asynchronous transmission of each byte is preceded by start bit, signaling to the receiver about the beginning of the message, followed by data bits and, perhaps, parity bit(parity,). Completes the parcel stop bit, guaranteeing a pause between messages (Fig. 2.1). The start bit of the next byte is sent at any moment after the stop bit, that is, pauses of arbitrary length are possible between transmissions. The start bit, which always has a strictly defined value (logical 0), provides a simple mechanism for synchronizing the receiver with the signal from the transmitter. It is assumed that the receiver and transmitter operate at the same baud rate. The internal clock generator of the receiver uses a reference frequency divider counter, which is reset when the start bit is received. This counter generates internal strobes, according to which the receiver fixes subsequent received

bits. Ideally, strobes are located in the middle of the bit intervals, which allows data to be received even with a slight mismatch between the receiver and transmitter rates. Obviously, when transmitting 8 data bits, one control bit and one stop bit, the maximum allowable speed mismatch, at which the data will be recognized correctly, cannot exceed 5%. Taking into account the phase distortions and discreteness of the internal synchronization counter, a smaller frequency deviation is actually permissible. The smaller the division factor of the reference frequency of the internal oscillator (the higher the transmission frequency), the greater the error in aligning the strobes to the middle of the bit interval, and the requirements for frequency consistency become more stringent. The higher the transmission frequency, the greater the influence of edge distortions on the phase of the received signal. The interaction of these factors leads to an increase in the requirements for the consistency of the frequencies of the receiver and transmitter with an increase in the exchange frequency.

The asynchronous send format allows you to identify possible transmission errors:

» If a drop is received, signaling the start of a message, and a logic-one level is fixed by the start-bit strobe, the start-bit is considered false and the receiver switches to the waiting state again. The receiver may not report this error.

“If during the time allotted for the stop bit, a logic zero level is detected, a stop bit error is recorded.

"« If parity is used, then after sending the data bit is transmitted control bit. This bit pads the number of single data bits to odd or even, depending on the accepted convention. Reception of a byte with an incorrect check bit value leads to an error fixation.

Format control allows line break detection:

in this case, a logical zero is accepted, which is first interpreted as a start-bit, and zero data bits, then the stop-bit control is triggered.

For the asynchronous mode, the following series is adopted standard exchange rates: 50, 75, 110, 150,300,600,1200,2400,4800,9600, 19,200, 38,400, 57,600 and 115,200 bps. Sometimes baud is used instead of bit / s, but this is not correct when considering binary transmitted signals. In baud, it is customary to measure the frequency of the line state change, and with a non-binary coding method (widely used in modern modems) in the communication channel, the bit rate (bit / s) and signal change (baud) can differ several times (for more details, see Appendix A ).

Quantity data bit can be 5, 6, 7, or 8 (5- and 6-bit formats are not very common). Number of stop bit can be 1, 1.5 or 2 ("one and a half bits" means only the length of the stop interval).

Asynchronous exchange in PC is implemented using COM port with using the protocol RS-232C.

Synchronous the transmission mode assumes constant activity of the communication channel. The transmission starts with a synchrobyte, immediately followed by a stream of information bits. If the transmitter has no data to transmit, it fills the gap by continuously sending sync bytes. Obviously, when transferring large amounts of data, the overhead for synchronization in this mode will be lower than in asynchronous mode. However, in synchronous mode, external synchronization of the receiver with the transmitter is necessary, since even a small frequency deviation will lead to distortion of the received data. External synchronization is possible either by using a separate line for transmitting the synchronization signal, or using self-synchronizing data coding, in which synchronization pulses can be extracted from the received signal at the receiver side. In any case, synchronous operation requires expensive communication lines or terminal equipment. For PCs, there are special cards - SDLC adapters (expensive) that support the synchronous exchange mode. They are used primarily for communication with large IBM machines (mainframes) and are not widely used. Of the synchronous adapters, V.35 interface adapters are currently used.

On physical level the serial interface has different implementations, differing in the way in which electrical signals are transmitted. There are a number of related international standards: RS-232C, RS-423A, RS-422A and RS-485. In fig. 2.2 shows the connection diagrams of receivers and transmitters, and also shows the restrictions on the length of the line (L) and the maximum data rate (V).

Unbalanced line interfaces RS-232C and RS-423A have the lowest immunity to common mode noise, although the differential input of the receiver RS-423A somewhat softens the situation. Best parameters has a point-to-point interface RS-422A and its trunk (bus) analog RS-485, operating on symmetrical communication lines. They use differential signals with a separate (twisted) pair of wires to transmit each signal.

In the listed standards, the signal is represented potential. There are serial interfaces, where the current flowing through the common transmitter-receiver circuit is informative - "current loop" and MIDI. Wireless infrared communication standards are adopted for communication over short distances. The most widespread in the PC was the simplest of the listed - the standard RS-232C, implemented by COM ports. In industrial automation, it is widely used RS-485, and RS-422A, found in some printers. Signal converters exist to accommodate these related interfaces.

2.2. RS-232C interface

The interface is designed to connect equipment transmitting or receiving data (OOD - data terminal equipment or ADF - data transmission equipment; DTE - Data Terminal Equipment), to the terminal equipment of data channels (DCE; DCE - Data Communication Equipment). The ADF can be a computer, printer, plotter and other peripheral equipment. The DCE is usually a modem. The ultimate purpose of a connection is to connect two ADF devices. The complete connection diagram is shown in Fig. 2.3. The interface allows you to exclude a remote communication channel together with a pair of ATM devices by connecting the devices directly using a null-modem cable (Fig. 2.4).

The standard describes interface control signals, data transfer, electrical interface, and connector types. The standard provides for asynchronous and synchronous exchange modes, but COM ports only support asynchronous mode. Functionally RS-232C equivalent to CCITT V.24 / V.28 standard and C2 interface, but they have different signal names.

2.2.1. Electrical interface

Standard RS-232C uses single-ended transmitters and receivers - the signal is transmitted with respect to the common wire - the circuit ground (balanced differential signals are used in other interfaces - for example, RS-422). Interface DOES NOT PROVIDE GALVANIC ISOLATION devices. The logical unit corresponds to the voltage across receiver input in the range -12 ...- 3 V. For control signal lines, this state is called ON("On"), for serial data lines - MARK. The logical zero corresponds to the range +3 ... + 12 V. For control signal lines, the state is called OFF("Off"), and for serial data lines - SPACE. The range is -3 ... + 3 V - the dead zone, which determines the hysteresis of the receiver: the line state will be considered changed only after crossing the threshold (Fig. 2.5). The signal levels at the outputs of the transmitters must be in the ranges -12 ...- 5 V and +5 ... + 12 V to represent one and zero, respectively. The potential difference between the circuit grounds (SG) of the devices to be connected must be less than 2 V, with a higher potential difference, incorrect perception of signals is possible. The interface assumes the presence PROTECTIVE EARTH for the devices to be connected, if they are both powered from the mains alternating current and have surge protectors.

Connecting and disconnecting interface cables self-powered devices must be with power off. Otherwise, the difference in unbalanced potentials of devices at the moment of switching may be applied to the output or input (which is more dangerous) interface circuits and damage the microcircuit.

For interface RS-232C buffer microcircuits of receivers (with hysteresis and bipolar signal transmitter) are specially produced. If grounding and switching rules are not followed, they are usually the first victims of "pyrotechnic" effects. Sometimes they are installed in "cribs" to facilitate replacement. Pinout of signal conditioners microcircuits RS-232C is shown in Fig. 2.6. Often, buffer circuits are included directly in the interface LSI. This reduces the cost of the product, saves space on the board, but in the event of an accident it results in large financial losses. It is unlikely to damage the interface microcircuits by closing the signal circuits: the short-circuit current of the transmitters usually does not exceed 20 mA.

Standard RS-232C regulates types of connectors used.

On the hardware ADF(including on COM ports) it is customary to install forks(male - "dad") DB-25P or a more compact option - DB-9P. Nine-pin connectors do not have additional signal pins required for synchronous operation (most 25-pin connectors do not use these pins).

On the hardware AKD(modems) install sockets(female - "mother") DB-25Swm DB-9S.

This rule assumes that the connectors AKD can connect to connectors ADF directly or through adapter "straight" cables with a socket and a plug, in which the contacts are connected "one-to-one". Adapter cables can also be adapters from 9-to 25-pin connectors (Fig. 2.7).

If the hardware ADF connects without modems, then the device connectors (plugs) are connected to each other null modem cable(Zero-modem or Z-modem), having sockets at both ends, the contacts of which are cross-connected according to one of the diagrams shown in Fig. 2.8.

If on any device ADF an outlet is installed - this is an almost one hundred percent sign that it should be connected to another device with a straight cable, similar to the modem connection cable. The socket is usually installed on those devices for which a remote connection via a modem is not provided.

Table 2.1 shows the purpose of the contacts of the connectors of the COM ports (and any other equipment ADF). The pins of the DB-25S connector are defined by the EIA / TIA-232-E standard, the DB-9S connector is described by the EIA / TIA-574 standard. For modems, the names of circuits and contacts are the same, but the roles of signals (input-output) are reversed.

Subset of signals RS-232C, related to the asynchronous mode, we will consider from the point of view of the PC COM port. It should be remembered that the active state of the signal ("on") and logical unit transmitted data corresponds negative potential(below -3 V) of the interface signal, and the state "off" and logical zero - positive(above +3 V). The purpose of the interface signals is shown in table. 2.2.

1 * - 8-bit multicard loop.

2 * - loop of 16-bit multicards and ports on motherboards... 3 * - a variant of a port loop on motherboards. 4 * - wide ribbon cable to 25-pin connector.

2.2.2. Data flow control

To control the flow of data (Flow Control), two protocol options can be used - hardware and software. Sometimes flow control is confused with handshaking, but these are different methods of achieving the same goal - matching the rate of transmission and reception. Acknowledgment(Handshaking) means sending an item receipt notification, while flow control involves sending a notification about the impossibility of subsequent data reception.

Hardware flow control protocol RTS / CTS (Hardware Flow Control) uses the CTS signal, which allows you to stop transmitting data if the receiver is not ready to receive it (Fig. 2.9). The transmitter "releases" the next byte only when the CTS line is on. A byte that has already begun to be transmitted cannot be delayed by the CTS signal (this guarantees the integrity of the message). The hardware protocol provides the fastest transmitter response to receiver status. Asynchronous transceiver microcircuits have at least two registers in the receiving part -

shifting, to receive the next message, and storing, from which the received byte is read. This makes it possible to implement exchange using the hardware protocol without data loss.

The hardware protocol is convenient to use when connecting printers and plotters if they support it (Figure 2.10). When connecting two computers directly (without modems), the hardware protocol requires an RTS to CTS crossover.

If no hardware protocol is used, the transmitting terminal must have an “on” state on the CTS line with the RTS - CTS jumper. Otherwise, the transmitter will be "silent".

XON / XOFF software flow control protocol assumes the presence of a bidirectional data transmission channel. The protocol works as follows: if the device receiving the data detects the reasons why it cannot receive them further, it sends a byte symbol over the reverse serial channel XOFF(13h). The opposite device, having received this character, suspends the transmission. When the receiving device becomes ready to receive data again, it sends a character.

XON(llh), upon receipt of which the opposite device resumes transmission. The response time of the transmitter to a change in the state of the receiver in comparison with the hardware protocol is increased by at least the symbol transmission time (XON or XOFF) plus the response time of the transmitter program to receive a symbol (Fig. 2.11). It follows from this that lossless data can only be received by a receiver that has an additional buffer of received data and signals unavailability in advance (having free space in the buffer).

The advantage of the software protocol is that there is no need to transmit interface control signals - the minimum cable for two-way exchange can have only 3 wires (see Fig. 2.8a). The disadvantage, in addition to the requirement for a buffer and a longer response time (reducing the overall performance of the channel due to waiting for a signal XON), is the complexity of the implementation of the full-duplex exchange mode. In this case, flow control symbols must be extracted (and processed) from the received data stream, which limits the set of transmitted symbols. The minimum cable option for connecting a printer (plotter) with a protocol XON / XOFF is shown in Fig. 2.12.

In addition to these two common standard protocols supported by both the CP and the OS, there are others. Some serial plotters use software control but send non-standard characters XON / XOFF, a the words(ASCII strings). Such an exchange at the level of system protocol support is practically not supported (these plotters directly "talk" with the application program). Of course, you can write a COM port driver (interceptor INT 14h), but the need for it to process text messages from an output device usually does not delight a system programmer. The connection cable is the same as shown in fig. 2.12.

2.3. Current loop interface

A common serial interface is the current loop. In it, the electrical signal is not the voltage level relative to the common wire, but current in the two-wire line connecting the receiver and the transmitter. A logical unit (“on” state) corresponds to a current flow of 20 mA, and a logical zero corresponds to a lack of current. This presentation of signals for the described asynchronous send format allows detecting a line break - the receiver will notice the absence of a stop bit (a line break acts as a constant logical zero).

A current loop usually assumes galvanic isolation input circuits of the receiver from the device circuit. In this case, the source of the current in the loop is the transmitter (this variant is called an active transmitter). Power supply from the receiver (active receiver) is also possible, while the output switch of the transmitter can also be galvanically isolated from the rest of the transmitter circuit. There are simplified versions without galvanic isolation, but this is already a degenerate case of the interface. The galvanically isolated current loop allows signals to be transmitted over distances of up to several kilometers. The distance is determined by the resistance of the pair of wires and the level of interference. Since the interface requires a pair of wires for each signal, typically only two interface signals are used. In the case of bidirectional exchange, only the signals of the transmitted and received data are used, and the software method is used to control the flow. XON / XOFF. If bidirectional communication is not required, a single data line is used, and for flow control, the return line is used for the CTS signal (hardware protocol) or the opposite data line (software protocol).

Convert Signals RS-232C into the current loop using a simple circuit (Fig. 2.13). Here the printer is connected via a current loop to a COM port with hardware flow control. Power from the interface is used to obtain the bipolar signal required for the COM port input signals.

With proper software, one current loop can provide bi-directional half-duplex communication between two devices. In this case, each receiver "hears" both the signals of the transmitter on the opposite side of the channel, and the signals of its own transmitter. They are regarded by communication packets as simply an echo. For error-free reception, the transmitters must work in turn.

2.4. MIDI interface

Digital interface musical instruments MIDI(Musical Instrument Digital Interface) is a bi-directional serial asynchronous interface with a transmission rate of 31.25 Kbps. Developed in 1983, this interface has become the de facto standard for interfacing computers, synthesizers, recording and playback devices, mixers, special effects devices, and other electronic music equipment.

The interface applies such a loop is 10 mA(5 mA possible) with galvanic isolation of the input circuit. This eliminates the connection of the "circuit grounds" of the connected devices through the interface cable, eliminating interference that is highly undesirable for audio equipment. The selection of the transmission frequency, which coincides with one of the values ​​of the quantization frequencies used in digital audio recording, also serves to reduce interference noise.

Asynchronous sending contains a start bit, 8 information bits and 1 stop bit, no parity. The most significant bit of the transmission is a command / data attribute. Its value of zero indicates the presence of seven data bits in the least significant bits. When set to one, the bits contain command code, and the bits are channel number. Commands can be either addressed to a specific channel or broadcast unaddressed. The last group includes commands for start, stop and time stamps, which ensure synchronization of devices (synchronization system MIDI Sync and MTS - MIDI Time Code).

The interface defines three types of ports: MIDI-In, MIDI-Out nMIDI-Thru.

Input Port MIDI-In is an input of the interface "current loop 10 mA", galvanically isolated from the receiver by an optocoupler with a speed of at least 2 μs. The device monitors the information flow at this input and responds to commands and data addressed to it.

Output port MIDI-Out represents the output of a 10 mA current source, galvanically coupled to the device circuit. The limiting resistors protect the output circuits from damage in the event of a ground fault or a 5V source. The output is the information flow from this device. The stream can also contain the translated input stream.

MIDI Thru Pass(optional) serves to relay the input signal.

The connectors are 5-pin DIN connectors common in consumer audio equipment. Sockets are installed on all devices, plugs on cables. All MIDI connecting cables are unified (Fig. 2.14). Pin 2 - cable shield - connects to the common wire only on the transmitter side (on the connectors MIDI-Out and MIDI-Thru).

There are discrepancies in the labeling of inputs and outputs shown next to the connectors. Some manufacturers write "In" or "Out" in accordance with the function of the connector of this device (and this is correct), then any cable connects "In" and "Out". Others believe that the signature should denote the function of the connected device. Then the cable will connect the connectors marked "In" - "In" and "Out" - "Out".

The interface allows you to combine a group of up to 16 devices in local area network... The topology must obey the rule:

entrance MIDI-In one device must be connected to the output MIDI-Out or MIDI-Thru another. When planning your MIDI network, you need to be guided by information flows and device communications. Control devices - keyboards, sequencers (in playback mode), synchronization sources - must be placed in front of the controlled ones. If devices need bi-directional communication, they are connected in a ring. It is possible to use special multiplexers that allow you to logically switch several input streams into one output stream. The degenerate case of a ring is a bidirectional connection of two devices. Several connection options are shown in Fig. 2.15.

The PC has a MIDI port on most audio adapters, its signals are routed to unused pins (12 and 15) of the game adapter connector. Connecting MIDI devices requires adapter adapter, implementing the "current loop" interface. The adapter adapter is usually built into a special cable, the diagram of which is shown in Fig. 2.16. Some PC models have built-in adapters and standard 5-pin MIDI connectors.

PC uses ports compatible with the controller for MIDI MPU-401(Roland) in UART mode. In I / O space MPU-401 occupies two contiguous addresses MPU(usually 330h) and MPU + 1:

"» Port DATA(address MPU + 0) - writing and reading bytes transmitted and received via the MIDI interface. Port STATUS / COMMAND(address MPU + 1) - read status / write commands (write - only for smart mode). The status byte defines the following bits:

Bit 7 - DSR(Data Set Ready) - readiness (DSR-0) received data for reading. The bit is set to "I" when all received bytes have been read from the data register.

Bit 6 - DRR(Data Read Ready) - readiness (DRR = 0) UART to be written to the data or command register. The ready-to-write condition will not occur if the receiver has an unread data byte.

On some motherboards, LSIs of interface controllers are used, in which the UART used for the COM port can be switched to the MIDI port mode by configuration via BIOS SETUP.